| 2003 |
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YEAR BOOK |
University of Limerick
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Design and test integration for next generation microelectronic circuits
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Today's electronic devices are made possible only by the continuing efforts to develop more complex electronic circuit functionality with reduced device geometries, leading to smaller, more power efficient microelectronic circuits capable of use in applications from high-speed communications through to biometric sensing and ambient intelligence. The end-user only sees the final product, but there are many steps involved in the design, fabrication and testing of the devices before the end-user has access to the Microelectronic Circuit (Integrated Circuit [IC], Microchip or 'Chip'). These devices may be digital, analogue or mixed-signal in nature.
The testing of microelectronic circuits has today greater importance in the overall product development cycle. Whilst in previous years, the test process was considered more an 'after-thought' once the circuit design cycle had been completed, it is now a key factor in early design decisions, following a 'Design for Testability' (DfT) approach. The traditional barrier between design and test is gradually being removed, developing a high level of integration between the design and test communities. Testing of the digital portions of a design is supported through structured DfT techniques with good Computer Aided Design (CAD) and Computer Aided Test (CAT) support. In contrast, the analogue and mixed-signal portions of the design present new sets of problems that are not easily addressed.
The testing of analogue and mixed-signal integrated circuits has become a topic of great interest in recent years in order to address problems associated with the cost and relevance of conventional test approaches, along with ATE (Automatic Test Equipment) cost and performance issues. A way to reduce test time and costs whilst maintaining or improving test quality is a major challenge. This is leading to the desire, driven by cost and quality requirements, to provide a mechanism for devices to incorporate the capability of testing themselves. Built-In Self-Test (BIST) for next generation Mixed-Signal Integrated Circuits (MS-ICs) is an area requiring extensive research, utilising semiconductor technologies towards the 90nm technology node. With the increasing design requirements, new semiconductor technologies, and need for lower costs with improved quality levels, test is becoming a key area in order to solve quality and cost issues. Test Engineering specific education is an important building-block in order to achieve the above.
The Test and DfT related work undertaken in the University of Limerick is considered from three key perspectives:
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(i) To investigate the educational needs for test engineering,
(ii) To investigate the test and Design for Testability (DfT) issues for advanced mixed-signal circuit designs, in particular analogue/digital converters for low-power, low-voltage operation, (iii) To investigate circuit and system level modelling, circuit level fault modelling, and simulation for Mixed-Signal System on a Chip (MS-SoC) solutions. |
Contact: Dr Ian Grout, Department of Electronic and Computer Engineering, University of Limerick;
Tel: 061-202298; Fax: 061-338176;
E-mail: [email protected] ; Web: http://www.ece.ul.ie/homepage/ian_grout